652 lines
18 KiB
Diff
652 lines
18 KiB
Diff
From 7b086336e3820714c564aac13dc44fbaf7f5bc17 Mon Sep 17 00:00:00 2001
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From: mindshub <info@mindshub.com>
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Date: Sat, 9 Aug 2025 10:16:33 +0200
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Subject: [PATCH] optional exti
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---
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Cargo.toml | 3 +-
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src/exti.rs | 548 ++++++++++++++++++++++++++--------------------------
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src/lib.rs | 1 +
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3 files changed, 281 insertions(+), 271 deletions(-)
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diff --git a/Cargo.toml b/Cargo.toml
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index ec451bf..55fa288 100644
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--- a/Cargo.toml
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+++ b/Cargo.toml
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@@ -56,7 +56,7 @@ proc-macro2 = "1.0"
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quote = "1.0"
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[features]
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-default = ["embassy", "rt"]
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+default = ["embassy", "rt", "exti"]
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rt = ["dep:qingke-rt"]
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highcode = ["qingke-rt/highcode"]
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embassy = [
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@@ -66,6 +66,7 @@ embassy = [
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]
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defmt = ["dep:defmt"]
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memory-x = ["ch32-metapac/memory-x"]
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+exti = []
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# Features starting with `_` are for internal use only. They're not intended
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diff --git a/src/exti.rs b/src/exti.rs
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index a2458d1..3d613ea 100644
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--- a/src/exti.rs
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+++ b/src/exti.rs
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@@ -1,37 +1,11 @@
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-use core::future::Future;
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-use core::marker::PhantomData;
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-use core::pin::Pin;
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-use core::task::{Context, Poll};
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-
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use embassy_sync::waitqueue::AtomicWaker;
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-use qingke_rt::interrupt;
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-use crate::gpio::{AnyPin, Input, Level, Pin as GpioPin, Pull};
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-use crate::{impl_peripheral, into_ref, peripherals, Peripheral};
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+use crate::{impl_peripheral, peripherals};
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const EXTI_COUNT: usize = 24;
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const NEW_AW: AtomicWaker = AtomicWaker::new();
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static EXTI_WAKERS: [AtomicWaker; EXTI_COUNT] = [NEW_AW; EXTI_COUNT];
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-pub unsafe fn on_irq() {
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- let exti = &crate::pac::EXTI;
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-
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- let bits = exti.intfr().read();
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-
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- // We don't handle or change any EXTI lines above 24.
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- let bits = bits.0 & 0x00FFFFFF;
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-
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- // Clear pending - Clears the EXTI's line pending bits.
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- exti.intfr().write(|w| w.0 = bits);
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-
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- exti.intenr().modify(|w| w.0 = w.0 & !bits);
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-
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- // Wake the tasks
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- for pin in BitIter(bits) {
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- EXTI_WAKERS[pin as usize].wake();
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- }
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-}
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-
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struct BitIter(u32);
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impl Iterator for BitIter {
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@@ -48,150 +22,6 @@ impl Iterator for BitIter {
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}
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}
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-/// EXTI input driver
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-pub struct ExtiInput<'d> {
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- pin: Input<'d>,
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-}
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-
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-impl<'d> Unpin for ExtiInput<'d> {}
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-
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-impl<'d> ExtiInput<'d> {
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- pub fn new<T: GpioPin>(
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- pin: impl Peripheral<P = T> + 'd,
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- ch: impl Peripheral<P = T::ExtiChannel> + 'd,
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- pull: Pull,
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- ) -> Self {
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- into_ref!(pin, ch);
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- // Needed if using AnyPin+AnyChannel.
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- assert_eq!(pin.pin(), ch.number());
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-
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- Self {
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- pin: Input::new(pin, pull),
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- }
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- }
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-
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- pub fn is_high(&self) -> bool {
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- self.pin.is_high()
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- }
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-
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- pub fn is_low(&self) -> bool {
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- self.pin.is_low()
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- }
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-
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- pub fn get_level(&self) -> Level {
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- self.pin.get_level()
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- }
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-
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- pub async fn wait_for_high<'a>(&'a mut self) {
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- let fut = ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), true, false);
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- if self.is_high() {
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- return;
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- }
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- fut.await
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- }
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-
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- pub async fn wait_for_low<'a>(&'a mut self) {
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- let fut = ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), false, true);
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- if self.is_low() {
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- return;
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- }
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- fut.await
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- }
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-
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- pub async fn wait_for_rising_edge<'a>(&'a mut self) {
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- ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), true, false).await
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- }
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-
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- pub async fn wait_for_falling_edge<'a>(&'a mut self) {
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- ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), false, true).await
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- }
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-
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- pub async fn wait_for_any_edge<'a>(&'a mut self) {
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- ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), true, true).await
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- }
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-}
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-
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-#[must_use = "futures do nothing unless you `.await` or poll them"]
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-struct ExtiInputFuture<'a> {
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- pin: u8,
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- phantom: PhantomData<&'a mut AnyPin>,
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-}
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-
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-// EXTI0-EXTI23 Px0-Px23（x=A/B/C）
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-impl<'a> ExtiInputFuture<'a> {
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- fn new(pin: u8, port: u8, rising: bool, falling: bool) -> Self {
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- critical_section::with(|_| {
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- let exti = &crate::pac::EXTI;
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- let afio = &crate::pac::AFIO;
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-
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- let port = port as u8;
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- let pin = pin as usize;
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-
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- #[cfg(afio_v0)]
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- {
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- // AFIO_EXTICR
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- // stride: 2, len: 15, 8 lines
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- afio.exticr().modify(|w| w.set_exti(pin, port));
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- }
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- // V1, V2, V3, L1
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- #[cfg(any(afio_v3, afio_l1))]
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- {
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- // AFIO_EXTICRx
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- // stride: 4, len: 4, 16 lines
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- afio.exticr(pin / 4).modify(|w| w.set_exti(pin % 4, port));
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- }
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- #[cfg(afio_x0)]
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- {
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- // stride: 2, len: 15, 24 lines
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- afio.exticr(pin / 16).modify(|w| w.set_exti(pin % 16, port));
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- }
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- #[cfg(afio_ch641)]
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- {
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- // single register
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- afio.exticr().modify(|w| w.set_exti(pin, port != 0));
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- }
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-
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- // See-also: 7.4.3
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- exti.intenr().modify(|w| w.set_mr(pin, true)); // enable interrupt
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-
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- exti.rtenr().modify(|w| w.set_tr(pin, rising));
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- exti.ftenr().modify(|w| w.set_tr(pin, falling));
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- });
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-
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- Self {
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- pin,
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- phantom: PhantomData,
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- }
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- }
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-}
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-
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-impl<'a> Drop for ExtiInputFuture<'a> {
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- fn drop(&mut self) {
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- critical_section::with(|_| {
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- let exti = &crate::pac::EXTI;
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- let pin = self.pin;
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- exti.intenr().modify(|w| w.0 = w.0 & !(1 << pin));
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- });
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- }
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-}
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-
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-impl<'a> Future for ExtiInputFuture<'a> {
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- type Output = ();
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-
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- fn poll(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
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- let exti = &crate::pac::EXTI;
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-
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- EXTI_WAKERS[self.pin as usize].register(cx.waker());
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-
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- if exti.intenr().read().mr(self.pin as _) == false {
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- // intenr cleared by on_irq, then we can assume it is triggered
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- Poll::Ready(())
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- } else {
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- Poll::Pending
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- }
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- }
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-}
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-
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trait SealedChannel {}
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#[allow(private_bounds)]
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@@ -207,6 +37,7 @@ pub trait Channel: SealedChannel + Sized {
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pub struct AnyChannel {
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number: u8,
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}
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+
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impl_peripheral!(AnyChannel);
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impl SealedChannel for AnyChannel {}
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impl Channel for AnyChannel {
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@@ -267,128 +98,305 @@ mod _exti_24lines {
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impl_exti!(EXTI23, 23);
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}
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-/*
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-EXTI0
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-EXTI1
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-EXTI2
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-EXTI3
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-EXTI4
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-EXTI9_5
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-EXTI15_10
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-EXTI7_0
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-EXTI15_8
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-EXTI25_16
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-*/
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-
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-/// safety: must be called only once
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-#[cfg(gpio_x0)]
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-mod irq_impl {
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- use super::*;
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+#[cfg(feature = "exti")]
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+pub use exti_inner::*;
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+
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+#[cfg(feature = "exti")]
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+mod exti_inner {
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+ use super::{BitIter, Channel, EXTI_WAKERS};
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+ use crate::gpio::{AnyPin, Input, Level, Pin as GpioPin, Pull};
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+ use crate::{into_ref, Peripheral};
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+ use core::future::Future;
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+ use core::marker::PhantomData;
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+ use core::pin::Pin;
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+ use core::task::{Context, Poll};
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+ use qingke_rt::interrupt;
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+
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+ /// EXTI input driver
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+ pub struct ExtiInput<'d> {
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+ pin: Input<'d>,
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+ }
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+
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+ impl<'d> Unpin for ExtiInput<'d> {}
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+
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+ impl<'d> ExtiInput<'d> {
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+ pub fn new<T: GpioPin>(
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+ pin: impl Peripheral<P = T> + 'd,
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+ ch: impl Peripheral<P = T::ExtiChannel> + 'd,
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+ pull: Pull,
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+ ) -> Self {
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+ into_ref!(pin, ch);
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+ // Needed if using AnyPin+AnyChannel.
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+ assert_eq!(pin.pin(), ch.number());
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+
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+ Self {
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+ pin: Input::new(pin, pull),
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+ }
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+ }
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- #[interrupt]
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- unsafe fn EXTI7_0() {
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- on_irq();
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- }
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- #[interrupt]
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- unsafe fn EXTI15_8() {
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- on_irq();
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- }
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- #[interrupt]
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- unsafe fn EXTI25_16() {
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- on_irq();
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- }
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+ pub fn is_high(&self) -> bool {
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+ self.pin.is_high()
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+ }
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- pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) {
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- use crate::pac::Interrupt;
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+ pub fn is_low(&self) -> bool {
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+ self.pin.is_low()
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+ }
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- qingke::pfic::enable_interrupt(Interrupt::EXTI7_0 as u8);
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- qingke::pfic::enable_interrupt(Interrupt::EXTI15_8 as u8);
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- qingke::pfic::enable_interrupt(Interrupt::EXTI25_16 as u8);
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- }
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-}
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+ pub fn get_level(&self) -> Level {
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+ self.pin.get_level()
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+ }
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-#[cfg(all(gpio_v3, not(ch641)))]
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-mod irq_impl {
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- use super::*;
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+ pub async fn wait_for_high<'a>(&'a mut self) {
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+ let fut = ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), true, false);
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+ if self.is_high() {
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+ return;
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+ }
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+ fut.await
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+ }
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- #[interrupt]
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- unsafe fn EXTI0() {
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- on_irq();
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- }
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- #[interrupt]
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- unsafe fn EXTI1() {
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- on_irq();
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- }
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- #[interrupt]
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- unsafe fn EXTI2() {
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- on_irq();
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- }
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- #[interrupt]
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- unsafe fn EXTI3() {
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- on_irq();
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+ pub async fn wait_for_low<'a>(&'a mut self) {
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+ let fut = ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), false, true);
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+ if self.is_low() {
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+ return;
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+ }
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+ fut.await
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+ }
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+
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+ pub async fn wait_for_rising_edge<'a>(&'a mut self) {
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+ ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), true, false).await
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+ }
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+
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+ pub async fn wait_for_falling_edge<'a>(&'a mut self) {
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+ ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), false, true).await
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+ }
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+
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+ pub async fn wait_for_any_edge<'a>(&'a mut self) {
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+ ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), true, true).await
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+ }
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}
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- #[interrupt]
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- unsafe fn EXTI4() {
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- on_irq();
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+
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+ pub unsafe fn on_irq() {
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+ let exti = &crate::pac::EXTI;
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+
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+ let bits = exti.intfr().read();
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+
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+ // We don't handle or change any EXTI lines above 24.
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+ let bits = bits.0 & 0x00FFFFFF;
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+
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+ // Clear pending - Clears the EXTI's line pending bits.
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+ exti.intfr().write(|w| w.0 = bits);
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+
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+ exti.intenr().modify(|w| w.0 = w.0 & !bits);
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+
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+ // Wake the tasks
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+ for pin in BitIter(bits) {
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+ EXTI_WAKERS[pin as usize].wake();
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+ }
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}
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- #[interrupt]
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- unsafe fn EXTI9_5() {
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- on_irq();
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+
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+ #[must_use = "futures do nothing unless you `.await` or poll them"]
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+ struct ExtiInputFuture<'a> {
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+ pin: u8,
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+ phantom: PhantomData<&'a mut AnyPin>,
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+ }
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+
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+ // EXTI0-EXTI23 Px0-Px23（x=A/B/C）
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+ impl<'a> ExtiInputFuture<'a> {
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+ fn new(pin: u8, port: u8, rising: bool, falling: bool) -> Self {
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+ critical_section::with(|_| {
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+ let exti = &crate::pac::EXTI;
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+ let afio = &crate::pac::AFIO;
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+
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+ let port = port as u8;
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+ let pin = pin as usize;
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+
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+ #[cfg(afio_v0)]
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+ {
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+ // AFIO_EXTICR
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+ // stride: 2, len: 15, 8 lines
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+ afio.exticr().modify(|w| w.set_exti(pin, port));
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+ }
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+ // V1, V2, V3, L1
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+ #[cfg(any(afio_v3, afio_l1))]
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+ {
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+ // AFIO_EXTICRx
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+ // stride: 4, len: 4, 16 lines
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+ afio.exticr(pin / 4).modify(|w| w.set_exti(pin % 4, port));
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+ }
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+ #[cfg(afio_x0)]
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+ {
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+ // stride: 2, len: 15, 24 lines
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+ afio.exticr(pin / 16).modify(|w| w.set_exti(pin % 16, port));
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+ }
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+ #[cfg(afio_ch641)]
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+ {
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+ // single register
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+ afio.exticr().modify(|w| w.set_exti(pin, port != 0));
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+ }
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+
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+ // See-also: 7.4.3
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+ exti.intenr().modify(|w| w.set_mr(pin, true)); // enable interrupt
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+
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+ exti.rtenr().modify(|w| w.set_tr(pin, rising));
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+ exti.ftenr().modify(|w| w.set_tr(pin, falling));
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+ });
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+
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+ Self {
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+ pin,
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+ phantom: PhantomData,
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+ }
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+ }
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}
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- #[interrupt]
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- unsafe fn EXTI15_10() {
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- on_irq();
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+
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+ impl<'a> Drop for ExtiInputFuture<'a> {
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+ fn drop(&mut self) {
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+ critical_section::with(|_| {
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+ let exti = &crate::pac::EXTI;
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+ let pin = self.pin;
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+ exti.intenr().modify(|w| w.0 = w.0 & !(1 << pin));
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+ });
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+ }
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}
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- pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) {
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- use crate::pac::Interrupt;
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+ impl<'a> Future for ExtiInputFuture<'a> {
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+ type Output = ();
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- qingke::pfic::enable_interrupt(Interrupt::EXTI0 as u8);
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- qingke::pfic::enable_interrupt(Interrupt::EXTI1 as u8);
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- qingke::pfic::enable_interrupt(Interrupt::EXTI2 as u8);
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- qingke::pfic::enable_interrupt(Interrupt::EXTI3 as u8);
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- qingke::pfic::enable_interrupt(Interrupt::EXTI4 as u8);
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- qingke::pfic::enable_interrupt(Interrupt::EXTI9_5 as u8);
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- qingke::pfic::enable_interrupt(Interrupt::EXTI15_10 as u8);
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- }
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-}
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+ fn poll(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
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+ let exti = &crate::pac::EXTI;
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-#[cfg(gpio_v0)]
|
||
-mod irq_impl {
|
||
- use super::*;
|
||
+ EXTI_WAKERS[self.pin as usize].register(cx.waker());
|
||
|
||
- #[interrupt]
|
||
- unsafe fn EXTI7_0() {
|
||
- on_irq();
|
||
+ if exti.intenr().read().mr(self.pin as _) == false {
|
||
+ // intenr cleared by on_irq, then we can assume it is triggered
|
||
+ Poll::Ready(())
|
||
+ } else {
|
||
+ Poll::Pending
|
||
+ }
|
||
+ }
|
||
}
|
||
|
||
- pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) {
|
||
- use crate::pac::Interrupt;
|
||
+ /*
|
||
+ EXTI0
|
||
+ EXTI1
|
||
+ EXTI2
|
||
+ EXTI3
|
||
+ EXTI4
|
||
+ EXTI9_5
|
||
+ EXTI15_10
|
||
+ EXTI7_0
|
||
+ EXTI15_8
|
||
+ EXTI25_16
|
||
+ */
|
||
+
|
||
+ /// safety: must be called only once
|
||
+ #[cfg(gpio_x0)]
|
||
+ mod irq_impl {
|
||
+ use super::*;
|
||
+
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI7_0() {
|
||
+ on_irq();
|
||
+ }
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI15_8() {
|
||
+ on_irq();
|
||
+ }
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI25_16() {
|
||
+ on_irq();
|
||
+ }
|
||
+
|
||
+ pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) {
|
||
+ use crate::pac::Interrupt;
|
||
|
||
- qingke::pfic::enable_interrupt(Interrupt::EXTI7_0 as u8);
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI7_0 as u8);
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI15_8 as u8);
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI25_16 as u8);
|
||
+ }
|
||
}
|
||
-}
|
||
|
||
-#[cfg(all(gpio_v3, ch641))]
|
||
-mod irq_impl {
|
||
- use super::*;
|
||
+ #[cfg(all(gpio_v3, not(ch641)))]
|
||
+ mod irq_impl {
|
||
+ use super::*;
|
||
+
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI0() {
|
||
+ on_irq();
|
||
+ }
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI1() {
|
||
+ on_irq();
|
||
+ }
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI2() {
|
||
+ on_irq();
|
||
+ }
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI3() {
|
||
+ on_irq();
|
||
+ }
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI4() {
|
||
+ on_irq();
|
||
+ }
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI9_5() {
|
||
+ on_irq();
|
||
+ }
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI15_10() {
|
||
+ on_irq();
|
||
+ }
|
||
|
||
- #[interrupt]
|
||
- unsafe fn EXTI7_0() {
|
||
- on_irq();
|
||
+ pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) {
|
||
+ use crate::pac::Interrupt;
|
||
+
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI0 as u8);
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI1 as u8);
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI2 as u8);
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI3 as u8);
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI4 as u8);
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI9_5 as u8);
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI15_10 as u8);
|
||
+ }
|
||
}
|
||
|
||
- #[interrupt]
|
||
- unsafe fn EXTI15_8() {
|
||
- on_irq();
|
||
+ #[cfg(gpio_v0)]
|
||
+ mod irq_impl {
|
||
+ use super::*;
|
||
+
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI7_0() {
|
||
+ on_irq();
|
||
+ }
|
||
+
|
||
+ pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) {
|
||
+ use crate::pac::Interrupt;
|
||
+
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI7_0 as u8);
|
||
+ }
|
||
}
|
||
|
||
- pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) {
|
||
- use crate::pac::Interrupt;
|
||
+ #[cfg(all(gpio_v3, ch641))]
|
||
+ mod irq_impl {
|
||
+ use super::*;
|
||
+
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI7_0() {
|
||
+ on_irq();
|
||
+ }
|
||
+
|
||
+ #[interrupt]
|
||
+ unsafe fn EXTI15_8() {
|
||
+ on_irq();
|
||
+ }
|
||
+
|
||
+ pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) {
|
||
+ use crate::pac::Interrupt;
|
||
|
||
- qingke::pfic::enable_interrupt(Interrupt::EXTI7_0 as u8);
|
||
- qingke::pfic::enable_interrupt(Interrupt::EXTI15_8 as u8);
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI7_0 as u8);
|
||
+ qingke::pfic::enable_interrupt(Interrupt::EXTI15_8 as u8);
|
||
+ }
|
||
}
|
||
+ pub(crate) use irq_impl::*;
|
||
}
|
||
-
|
||
-pub(crate) use irq_impl::*;
|
||
diff --git a/src/lib.rs b/src/lib.rs
|
||
index 997da34..b451a55 100644
|
||
--- a/src/lib.rs
|
||
+++ b/src/lib.rs
|
||
@@ -140,6 +140,7 @@ pub fn init(config: Config) -> Peripherals {
|
||
::critical_section::with(|cs| unsafe {
|
||
gpio::init(cs);
|
||
dma::init(cs, config.dma_interrupt_priority);
|
||
+ #[cfg(feature = "exti")]
|
||
exti::init(cs);
|
||
});
|
||
|
||
|