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initial commit of heartbeat on ch32v

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sigil-03 2025-07-27 13:10:23 -06:00
commit faa1622857
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ch32v-insert-coin/.cargo/config.toml Normal file
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[build]
target = "riscv32ec-unknown-none-elf.json"
#target = "riscv32i-unknown-none-elf"
[target.'cfg(all(target_arch = "riscv32", target_os = "none"))']
# runner = "riscv64-elf-gdb -q -x openocd.gdb"
# runner = "riscv-none-embed-gdb -q -x openocd.gdb"
# runner = "gdb -q -x openocd.gdb"
# runner = "wlink -v flash"
# runner = "wlink -v flash --enable-sdi-print --watch-serial"
# Flash and debug chip with probe-rs. https://probe.rs/
runner = "probe-rs run --chip ch32v003"
[unstable]
build-std = ["core"]
# build-std = ["core", "compiler_builtins"]
# build-std-features = ["compiler-builtins-mem"]
[target."riscv32ec-unknown-none-elf"]
rustflags = ["-C", "link-arg=-Tlink.x"]
#[target."riscv32i-unknown-none-elf"]
#rustflags = [
## "-C", "link-arg=-Tlink.x",
#]