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deep sleep with PDDS is working

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sigil-03 2025-09-12 16:19:26 -06:00
parent 1a420018d1
commit 885c7746b3
1 changed files with 11 additions and 2 deletions
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11
ch32v-insert-coin/src/main.rs
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@ -109,6 +109,15 @@ unsafe fn enter_standby(pin: usize) {
w.set_sleeponexit(false);
});
// set PDDS=1:
// get current value of PWR_CTLR
let mut reg: u32 = 0x4000_7000;
let mut val: u32 = 0;
unsafe { val = (reg as *mut u32).read_volatile(); }
// modify PDDS
val |= 1 << 1; // PWR_CTLR[1] -> PDDS
unsafe { (reg as *mut u32).write_volatile(val); }
// // disable all exti interrupts
let exti = &hal::pac::EXTI;
// exti.intenr().write(| w| {
@ -145,7 +154,7 @@ unsafe fn enter_standby(pin: usize) {
unsafe fn init_gpio_irq(pin: u8, port: u8, rising: bool, falling: bool) {
critical_section::with(|_| {
#[cfg(features="enable_print")]
#[cfg(feature="enable_print")]
println!("init_gpio_irq");
let exti = &hal::pac::EXTI;
let afio = &hal::pac::AFIO;