move most of the system functions out of main.rs
This commit is contained in:
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08d7289c93
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3eb410c796
2 changed files with 162 additions and 143 deletions
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@ -3,7 +3,12 @@
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#![feature(type_alias_impl_trait)]
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#![feature(impl_trait_in_assoc_type)]
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// app stuff
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mod insert_coin;
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// system stuff
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mod system;
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use ch32_hal::{adc::AdcChannel, interrupt::typelevel::Handler, timer::low_level::OutputPolarity};
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use insert_coin::{CoreConfig, InsertCoin, SimplePwmCore};
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@ -84,139 +89,6 @@ pub enum SystemState {
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Active,
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}
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/// enter standby (SLEEPDEEP) mode, with WFE enabled.
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/// from CH32V003 reference manual 2.3.1:
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/// entry:
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/// 1. configure core register control bit: SLEEPDEEP=1 | PDDS = 1
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/// 2. configure external interrupt register to mask all but EXTI7_0
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/// 3. execute WFI or WFE (optionally SEVONPEND) and SLEEPONEXIT
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/// * (probably WFI?)
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/// exit:
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/// 1. any interrupt/event (set in external interrupt register)
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unsafe fn enter_standby(pin: usize) {
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critical_section::with(|_| {
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use hal::pac::Interrupt;
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use qingke_rt::CoreInterrupt;
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// configure core register control bit (SLEEPDEEP=1 | PDDS=1)
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let pfic = &hal::pac::PFIC;
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pfic.sctlr().modify(|w| {
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// we only want to wake on enabled interrupts
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w.set_sevonpend(false);
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// we want to enable deep sleep
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w.set_sleepdeep(true);
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w.set_wfitowfe(false);
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w.set_sleeponexit(false);
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});
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// set PDDS=1:
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// get current value of PWR_CTLR
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let mut reg: u32 = 0x4000_7000;
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let mut val: u32 = 0;
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unsafe {
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val = (reg as *mut u32).read_volatile();
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}
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// modify PDDS
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val |= 1 << 1; // PWR_CTLR[1] -> PDDS
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unsafe {
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(reg as *mut u32).write_volatile(val);
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}
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// // disable all exti interrupts
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let exti = &hal::pac::EXTI;
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// exti.intenr().write(| w| {
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// w.0 = 0x00000000;
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// // w.set_mr(pin, true);
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// // w.set_mr(pin, true);
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// });
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// clear all pending exti interrupts
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let bits = 0xFFFFFFFF;
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exti.intfr().write(|w| w.0 = bits);
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// enable all exti interrupts
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let exti = &hal::pac::EXTI;
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exti.intenr().write(|w| {
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w.0 = 0x00FFFFFF;
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// w.set_mr(pin, true);
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// w.set_mr(pin, true);
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});
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unsafe {
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qingke::pfic::disable_interrupt(CoreInterrupt::SysTick as u8);
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qingke::pfic::enable_interrupt(Interrupt::EXTI7_0 as u8);
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}
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// execute WFI
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#[cfg(feature = "enable_print")]
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println!("WFI CONFIGURED HOPEFULLY");
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});
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}
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unsafe fn init_gpio_irq(pin: u8, port: u8, rising: bool, falling: bool) {
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critical_section::with(|_| {
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#[cfg(feature = "enable_print")]
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println!("init_gpio_irq");
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let exti = &hal::pac::EXTI;
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let afio = &hal::pac::AFIO;
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let port = port as u8;
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let pin = pin as usize;
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// let b = afio.exticr().read();
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afio.exticr().modify(|w| w.set_exti(pin, port));
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exti.intenr().modify(|w| w.set_mr(pin, true)); // enable interrupt
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exti.rtenr().modify(|w| w.set_tr(pin, rising));
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exti.ftenr().modify(|w| w.set_tr(pin, falling));
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});
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}
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fn clear_interrupt(coin_pin: u8, button_pin: u8) {
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let exti = &hal::pac::EXTI;
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let coin_pin = coin_pin as usize;
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let button_pin = button_pin as usize;
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exti.intenr().modify(|w| w.set_mr(coin_pin, false)); // disable interrupt
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exti.intenr().modify(|w| w.set_mr(button_pin, false)); // disable interrupt
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let bits = exti.intfr().read();
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// We don't handle or change any EXTI lines above 24.
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let bits = bits.0 & 0x00FFFFFF;
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// coin_flag
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if (bits & (0x1 << coin_pin)) != 0x0 {
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#[cfg(feature = "enable_print")]
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println!("coin irq!");
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unsafe {
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INPUT_FLAGS.coin_flag = true;
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}
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}
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// button_flag
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if (bits & (0x1 << button_pin)) != 0x0 {
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#[cfg(feature = "enable_print")]
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println!("button irq!");
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unsafe {
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INPUT_FLAGS.button_flag = true;
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}
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}
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// Clear pending - Clears the EXTI's line pending bits.
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exti.intfr().write(|w| w.0 = bits);
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use hal::pac::Interrupt;
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unsafe {
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qingke::pfic::unpend_interrupt(Interrupt::EXTI7_0 as u8);
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};
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// exti.intenr().modify(|w| w.0 = w.0 & !bits);
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exti.intenr().modify(|w| w.set_mr(coin_pin, true)); // enable interrupt
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exti.intenr().modify(|w| w.set_mr(button_pin, true)); // enable interrupt
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}
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#[derive(Debug)]
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struct InputFlags {
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coin_flag: bool,
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@ -233,8 +105,8 @@ impl Handler<hal::interrupt::typelevel::EXTI7_0> for Test {
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unsafe fn on_interrupt() {
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#[cfg(feature = "enable_print")]
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println!("on_interrupt()");
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critical_section::with(|_| {
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clear_interrupt(2, 6);
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critical_section::with(|_| unsafe {
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INPUT_FLAGS = system::clear_interrupt(2, 6);
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});
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}
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}
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@ -254,12 +126,12 @@ fn debug_main(mut p: hal::Peripherals, mut delay: Delay) -> ! {
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// button pin setup
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let button_pin = p.PD6;
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unsafe { init_gpio_irq(button_pin.pin(), button_pin.port(), false, true) };
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unsafe { system::init_gpio_irq(button_pin.pin(), button_pin.port(), false, true) };
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let mut button_input = Input::new(button_pin, Pull::Up);
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delay.delay_ms(1000);
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unsafe { enter_standby(4) };
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unsafe { system::enter_standby(4) };
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delay.delay_ms(1000);
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riscv::asm::wfi();
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@ -357,8 +229,8 @@ fn app_main(mut p: hal::Peripherals, mut delay: Delay) -> ! {
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// 2025-09-10 00:32:23.515: push pin: 6 | push port: 3
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// set up interrupts
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unsafe { init_gpio_irq(coin_pin.pin(), coin_pin.port(), false, true) };
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unsafe { init_gpio_irq(button_pin.pin(), button_pin.port(), true, true) };
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unsafe { system::init_gpio_irq(coin_pin.pin(), coin_pin.port(), false, true) };
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unsafe { system::init_gpio_irq(button_pin.pin(), button_pin.port(), true, true) };
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// coin debouncer (100ms)
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let mut coin_input = DebouncedGPIO::new(coin_pin.degrade(), core_config.tick_rate_hz, 100);
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@ -411,7 +283,8 @@ fn app_main(mut p: hal::Peripherals, mut delay: Delay) -> ! {
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let tick_interval_us = 1000000 / interfaces.config.tick_rate_hz - 10;
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// dac data
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let coin_sound = include_bytes!("../audio/coin.raw");
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// let coin_sound = include_bytes!("../audio/coin.raw");
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let coin_sound = include_bytes!("../audio/sweep_dpcm_u4.raw");
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// let button_sound = include_bytes!("../audio/coinMixTest1_dpcm_u4.raw");
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let mut system_state = SystemState::Active;
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@ -425,7 +298,7 @@ fn app_main(mut p: hal::Peripherals, mut delay: Delay) -> ! {
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// use qingke_rt::CoreInterrupt;
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// qingke::pfic::unpend_interrupt(Interrupt::EXTI7_0 as u8);
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clear_interrupt(2, 6);
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system::clear_interrupt(2, 6);
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qingke::pfic::enable_interrupt(Interrupt::EXTI7_0 as u8);
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// qingke::pfic::enable_interrupt(CoreInterrupt::SysTick as u8);
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}
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@ -540,7 +413,7 @@ fn app_main(mut p: hal::Peripherals, mut delay: Delay) -> ! {
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match system_state {
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SystemState::DeepSleep => {
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// TODO: make this REALLY deep sleep
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unsafe { enter_standby(4) };
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unsafe { system::enter_standby(4) };
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loop {
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riscv::asm::wfi();
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let mut config = hal::Config::default();
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@ -600,7 +473,8 @@ fn main() -> ! {
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let mut delay = Delay;
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delay.delay_ms(1000);
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debug_main(p, delay);
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// debug_main(p, delay);
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app_main(p, delay);
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}
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#[panic_handler]
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145
ch32v-insert-coin/src/system.rs
Normal file
145
ch32v-insert-coin/src/system.rs
Normal file
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@ -0,0 +1,145 @@
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use ch32_hal as hal;
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use hal::println;
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pub unsafe fn init_gpio_irq(pin: u8, port: u8, rising: bool, falling: bool) {
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critical_section::with(|_| {
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#[cfg(feature = "enable_print")]
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println!("init_gpio_irq");
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let exti = &hal::pac::EXTI;
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let afio = &hal::pac::AFIO;
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let port = port as u8;
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let pin = pin as usize;
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// let b = afio.exticr().read();
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afio.exticr().modify(|w| w.set_exti(pin, port));
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exti.intenr().modify(|w| w.set_mr(pin, true)); // enable interrupt
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exti.rtenr().modify(|w| w.set_tr(pin, rising));
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exti.ftenr().modify(|w| w.set_tr(pin, falling));
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});
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}
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// FIXME: should return a vec of the interrupts
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pub fn clear_interrupt(coin_pin: u8, button_pin: u8) -> crate::InputFlags {
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let mut input_flags = crate::InputFlags {
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coin_flag: false,
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button_flag: false,
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};
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let exti = &hal::pac::EXTI;
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let coin_pin = coin_pin as usize;
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let button_pin = button_pin as usize;
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exti.intenr().modify(|w| w.set_mr(coin_pin, false)); // disable interrupt
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exti.intenr().modify(|w| w.set_mr(button_pin, false)); // disable interrupt
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let bits = exti.intfr().read();
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// We don't handle or change any EXTI lines above 24.
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let bits = bits.0 & 0x00FFFFFF;
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// coin_flag
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if (bits & (0x1 << coin_pin)) != 0x0 {
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#[cfg(feature = "enable_print")]
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println!("coin irq!");
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input_flags.coin_flag = true;
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// unsafe {
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// INPUT_FLAGS.coin_flag = true;
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// }
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}
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// button_flag
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if (bits & (0x1 << button_pin)) != 0x0 {
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#[cfg(feature = "enable_print")]
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println!("button irq!");
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input_flags.button_flag = true;
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// unsafe {
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// INPUT_FLAGS.button_flag = true;
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// }
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}
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// Clear pending - Clears the EXTI's line pending bits.
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exti.intfr().write(|w| w.0 = bits);
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use hal::pac::Interrupt;
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unsafe {
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qingke::pfic::unpend_interrupt(Interrupt::EXTI7_0 as u8);
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};
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// exti.intenr().modify(|w| w.0 = w.0 & !bits);
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exti.intenr().modify(|w| w.set_mr(coin_pin, true)); // enable interrupt
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exti.intenr().modify(|w| w.set_mr(button_pin, true)); // enable interrupt
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input_flags
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}
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/// enter standby (SLEEPDEEP) mode, with WFE enabled.
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/// from CH32V003 reference manual 2.3.1:
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/// entry:
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/// 1. configure core register control bit: SLEEPDEEP=1 | PDDS = 1
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/// 2. configure external interrupt register to mask all but EXTI7_0
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/// 3. execute WFI or WFE (optionally SEVONPEND) and SLEEPONEXIT
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/// * (probably WFI?)
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/// exit:
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/// 1. any interrupt/event (set in external interrupt register)
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pub unsafe fn enter_standby(pin: usize) {
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critical_section::with(|_| {
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use hal::pac::Interrupt;
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use qingke_rt::CoreInterrupt;
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// configure core register control bit (SLEEPDEEP=1 | PDDS=1)
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let pfic = &hal::pac::PFIC;
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pfic.sctlr().modify(|w| {
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// we only want to wake on enabled interrupts
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w.set_sevonpend(false);
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// we want to enable deep sleep
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w.set_sleepdeep(true);
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w.set_wfitowfe(false);
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w.set_sleeponexit(false);
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});
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// set PDDS=1:
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// get current value of PWR_CTLR
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let mut reg: u32 = 0x4000_7000;
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let mut val: u32 = 0;
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unsafe {
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val = (reg as *mut u32).read_volatile();
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}
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// modify PDDS
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val |= 1 << 1; // PWR_CTLR[1] -> PDDS
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unsafe {
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(reg as *mut u32).write_volatile(val);
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}
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// // disable all exti interrupts
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let exti = &hal::pac::EXTI;
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// exti.intenr().write(| w| {
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// w.0 = 0x00000000;
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// // w.set_mr(pin, true);
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// // w.set_mr(pin, true);
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// });
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// clear all pending exti interrupts
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let bits = 0xFFFFFFFF;
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exti.intfr().write(|w| w.0 = bits);
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// enable all exti interrupts
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let exti = &hal::pac::EXTI;
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exti.intenr().write(|w| {
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w.0 = 0x00FFFFFF;
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// w.set_mr(pin, true);
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// w.set_mr(pin, true);
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});
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unsafe {
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qingke::pfic::disable_interrupt(CoreInterrupt::SysTick as u8);
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qingke::pfic::enable_interrupt(Interrupt::EXTI7_0 as u8);
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}
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// execute WFI
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#[cfg(feature = "enable_print")]
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println!("WFI CONFIGURED HOPEFULLY");
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});
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}
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